There are numerous semiconductor process steps involved in the development of modem day integrated circuits (ICs). From the initial fabrication of silicon substrates to final packaging and testing, integrated circuit manufacturing involves many fabrication steps, including photolithography, doping, etching and thin film deposition. As a result of these processes, integrated circuits are formed of microscopic devices and wiring amid multiple layers.
Contact vias or openings are commonly formed in insulating materials known as interlevel dielectrics (ILDs). The vias are then filled with conductive material, thereby interconnecting electrical devices and wiring at various levels. Damascene processing similarly involves etching trenches in insulating layers in a desired pattern for a wiring layer. These trenches are then filled with conductive material to produce the integrated wires. Where contact vias, extending downwardly from the bottom of the trenches, are simultaneously filled, the process is known as dual damascene.
The integrated wires that interconnect between different active devices should be fabricated of a relatively low resistivity material. Aluminum (Al), for example, has generally prevailed as the material of choice in the development of integrated wires or “runners” because of its low resistivity (˜2.7 μΩ-cm). Other favorable characteristics of aluminum include good adhesion to insulation layers such as silicon oxide surfaces (SiO2). Copper demonstrates even lower resistivity, though it introduces its own difficulties in integration.
Ideally, highly conductive metals should be employed not only in lateral runners, but also in vertical contact regions. Contact openings, however, are being developed with higher aspect ratios (A/R), such that aluminum can not adequately fill the contact openings by conventional physical vapor deposition (PVD) sputtering. Imperfect aluminum deposition also results in electromigration at points of inadequate fill, especially in the contact regions where there are generally large current densities. Furthermore, Al—Si contact interfaces are prone to junction spiking resulting in large leakage currents or even electrical shorts.
On the other hand, metals for which chemical vapor deposition (CVD) are well developed, such as tungsten (W) are most often employed for filling contact openings with high aspect ratios. Tungsten (W) exhibits excellent resistance to electromigration effects, hillock formation, and humidity-induced corrosion. Since W can be deposited by means of CVD, it allows much better step coverage that can be obtained by sputter-deposited or evaporated films (e.g., Al films). The downside corollary to depositing W is its relatively high resistivity (˜6-15 μΩ-cm). Moreover, separate plug and wiring formation is less efficient than simultaneous formation using dual damascene process flows.
There is consequently a need for improved methods and structures for integrated circuit interconnects, including contacts or plugs and metal runners.